Log Number: P31
Abstract Submitted to the    NANOTUBE'04 Conference:

Nanotube Transistors on SrTiO3/Si Substrates

B. M. Kim2, T. Brintlinger1, E. Cobas1 and M. S. Fuhrer1

1 Department of Physics and Center for Superconductivity Research, University of Maryland, College Park, MD 20742-4111, USA
2Present address: Department of Mechanical Engineering and Applied Mechanics, University of Pennsylvania, Philadelphia, PA 19104, USA
Contact e-mail: mfuhrer@physics.umd.edu

Semiconducting SWNT field effect transistors (NT-FETs) have been fabricated on top of a high-dielectric-constant (κ = 175) SrTiO3 gate dielectric film on silicon, with the conducting silicon acting as a back-gate electrode. The NT-FETs show transconductances normalized by channel width of 8900 S/m[1], greatly exceeding that in the best Si FETs. Interestingly, the high transconductance cannot be explained by increased gate capacitance alone; the gate capacitance is largely limited by the quantum capacitance of the nanotube in high-dielectric-constant NT-FETs. We propose that the high transverse electric field at the contact lowers or eliminates the Schottky barrier at finite gate voltage.

[1] B. M. Kim, T. Brintlinger, E. Cobas, M. S. Fuhrer, Haimei Zhang, Z. Yu, R. Droopad, J. Ramdani, and K. Eisenbeiser, Applied Physics Letters 84, 1946 (2004).

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